SI4021-A1-FT【PDF 14/34 页】IC TX FSK 915MHZ 5.4V 16-TSSOP

Si4021

2. Power Management Command

bit 15 14 13 12 11 10

POR

a1 a0 ex es ea eb et dc

C000h

Bits 5-0, enable the corresponding block of the transmitters, i.e. the crystal oscillator is enabled by the ex bit, the synthesizer by es, the

power amplifier by ea and the low battery detector by eb, while the wake-up timer by et. The bit dc disables the clock output buffer.

When receiving the Data Transmit Command, the chip supports automatic on/off control over the crystal oscillator, the PLL and the PA.

If bit a1 is set, the crystal oscillator and the synthesizer are controlled automatically. Data Transmit Command starts up the crystal oscillator

and as soon as a stable reference frequency is available the synthesizer starts. After a subsequent delay to allow locking of the PLL, if a0 is

set the power amplifier is turned on as well.

Note:

? To enable the automatic internal control of the crystal oscillator, the synthesizer and the power amplifier, the corresponding bits

(ex, es, ea) must be zero in the Power Management Command.

? In microcontroller mode, the ex bit should be set in the Power Management Command for the correct control of es and ea. The

oscillator can be switched off by clearing the ex bit after the transmission.

? In EEPROM operation mode after an identified Data Transmit Command the internal logic switches on the synthesizer and PA. At

the end of Data Transmit Command header if necessary the current clock cycle is automatically extended to ensure the PLL

stabilization and RF power ramp-up.

? In EEPROM operation mode the internal logic switches off the PA when the given number of bytes is transmitted. (See: Data

Transmit Command in EEPROM operation.)

? When the chip is controlled by a microcontroller, the Sleep Command can be used to indicate the end of the data transmission

process, because in microcontroller mode the Data Transmit Command does not contain the length of the TX data.

? For processing the events caused by the peripheral blocks (POR, LBD, wake-up timer, push-buttons) the chip requires operation of

the crystal oscillator. This operation is fully controlled internally, independently from the status of the ex bit, but if the dc bit is zero,

the oscillator remains active until Sleep Command is issued. (This command can be considered as an event controller reset.)

Oscillator control logic

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